Merge remote-tracking branch 'origin/master'

data/dsntp/ieeeds/case13/dev/cns_ieee13.csv

 CN,Terminal
 CN,Terminal
-650,650
-632,632
-645,645
-633,633
-634,634
-684,684
-646,646
-652,652
-671,671
-675,675
-692,692
-611,611
-680,680
+650,1
+632,2
+645,3
+632,4
+633,5
+633,6
+634,7
+645,8
+646,9
+650,10
+632,11
+684,12
+652,13
+632,14
+671,15
+671,16
+684,17
+671,18
+680,19
+671,20
+692,21
+684,22
+611,23
+692,24
+675,25
+634,26
+645,27
+646,28
+652,29
+671,30
+675,31
+692,32
+611,33
\ No newline at end of file

data/dsntp/ieeeds/case13/dev/devices_ieee13.csv

 Index,ID,Device Define Id,Name,Description,Terminal,Container,Name,ID,Property ID,Property Value,Property ID,Property Value,Property ID,Property Value
 Index,ID,Device Define Id,Name,Description,Terminal,Container,Name,ID,Property ID,Property Value,Property ID,Property Value,Property ID,Property Value
-1,1,7,Infinite Bus,源,650,,ieee,1,,,,,,
+1,1,7,Infinite Bus,源,1,,ieee,1,,,,,,
 2,2,1,BaseVoltage,电压等级,,,ieee,2,1,10000,,,,
 2,2,1,BaseVoltage,电压等级,,,ieee,2,1,10000,,,,
-3,3,2,line1,,632;645,,ieee,3,3,603,4,500,,
-4,4,2,line2,,632;633,,ieee,4,3,602,4,500,,
-5,5,5,transformer,变压器,633;634,,ieee,5,3,4.16-Gr.W 0.48-Gr.W,9,1.1,10,2
-6,6,2,line3,,645;646,,ieee,6,3,603,4,300,,
-7,7,2,line4,,650;632,,ieee,7,3,601,4,2000,,
-8,8,2,line5,,684;652,,ieee,8,3,607,4,800,,
-9,9,2,line6,,632;671,,ieee,9,3,601,4,2000,,
-10,10,2,line7,,671;684,,ieee,10,3,604,4,300,,
-11,11,2,line8,,671;680,,ieee,11,3,601,4,1000,,
-12,12,3,switch,开关,671;692,,ieee,12,2,false,,,,
-13,13,2,line9,,684;611,,ieee,13,3,605,4,300,,
-14,14,2,line10,,692;675,,ieee,14,3,606,4,500,,
-15,15,4,Load,负荷,634,,ieee,15,,,,,,
-16,16,4,Load,,645,,ieee,16,,,,,,
-17,17,4,Load,,646,,ieee,17,,,,,,
-18,18,4,Load,,652,,ieee,18,,,,,,
-19,19,4,Load,,671,,ieee,19,,,,,,
-20,20,4,Load,,675,,ieee,20,,,,,,
-21,21,4,Load,,692,,ieee,21,,,,,,
-22,22,4,Load,,611,,ieee,22,,,,,,
+3,3,2,line1,,2;3,,ieee,3,3,603,4,500,,
+4,4,2,line2,,4;5,,ieee,4,3,602,4,500,,
+5,5,5,transformer,变压器,6;7,,ieee,5,3,4.16-Gr.W 0.48-Gr.W,9,1.1,10,2
+6,6,2,line3,,8;9,,ieee,6,3,603,4,300,,
+7,7,2,line4,,10;11,,ieee,7,3,601,4,2000,,
+8,8,2,line5,,12;13,,ieee,8,3,607,4,800,,
+9,9,2,line6,,14;15,,ieee,9,3,601,4,2000,,
+10,10,2,line7,,16;17,,ieee,10,3,604,4,300,,
+11,11,2,line8,,18;19,,ieee,11,3,601,4,1000,,
+12,12,3,switch,开关,20;21,,ieee,12,2,false,,,,
+13,13,2,line9,,22;23,,ieee,13,3,605,4,300,,
+14,14,2,line10,,24;25,,ieee,14,3,606,4,500,,
+15,15,4,Load,负荷,26,,ieee,15,,,,,,
+16,16,4,Load,,27,,ieee,16,,,,,,
+17,17,4,Load,,28,,ieee,17,,,,,,
+18,18,4,Load,,29,,ieee,18,,,,,,
+19,19,4,Load,,30,,ieee,19,,,,,,
+20,20,4,Load,,31,,ieee,20,,,,,,
+21,21,4,Load,,32,,ieee,21,,,,,,
+22,22,4,Load,,33,,ieee,22,,,,,,

data/dsntp/ieeeds/case4/cns_ieee4.csv

+CN,Terminal
+1,1
+1,2
+2,3
+2,4
+3,5
+3,6
+4,7
+4,8
\ No newline at end of file

data/dsntp/ieeeds/case4/devices_ieee4.csv

 Index,ID,Device Define Id,Name,Description,Terminal,Container,Name,ID,Property ID,Property Value,Property ID,Property Value,Property ID,Property Value
 Index,ID,Device Define Id,Name,Description,Terminal,Container,Name,ID,Property ID,Property Value,Property ID,Property Value,Property ID,Property Value
-1,1,7,Infinite Bus,源,10,,ieee,1,,,,,,
-2,2,2,line1,线路1,21;22,,ieee,2,3,"336,400 26/7",4,,,
-3,3,5,transformer,变压器,31;32,,ieee,3,3,Wye-Delta Step Down,9,1.0,10,6.0
-4,4,2,line2,线路2,41;42,,ieee,4,3,"336,400 26/7",4,,,
-5,5,4,Load,负荷,50,,ieee,5,,,,,,
-6,6,1,BaseVoltage,电压等级,60,,ieee,6,1,10000,,,,
+1,1,7,Infinite Bus,源,1,,ieee,1,,,,,,
+2,2,2,line1,线路1,2;3,,ieee,2,3,"336,400 26/7",4,,,
+3,3,5,transformer,变压器,4;5,,ieee,3,3,Wye-Delta Step Down,9,1.0,10,6.0
+4,4,2,line2,线路2,6;7,,ieee,4,3,"336,400 26/7",4,,,
+5,5,4,Load,负荷,8,,ieee,5,,,,,,
+6,6,1,BaseVoltage,电压等级,,,ieee,6,1,10000,,,,
\ No newline at end of file

mems/examples/ds-3phase-pf/src/nlp.rs

@@ -15,7 +15,8 @@ pub fn get_pf_nlp_constraints(
     input_tns: Vec<u64>,
     input_tns: Vec<u64>,
     input_phases: Vec<MeasPhase>,
     input_phases: Vec<MeasPhase>,
     input_types: Vec<DataUnit>,
     input_types: Vec<DataUnit>,
-    input_values: Vec<f64>) -> Option<Vec<String>> {
+    input_values: Vec<f64>
+) -> Option<Vec<String>> {
     let mut constraint = Vec::with_capacity(dyn_topo.len());
     let mut constraint = Vec::with_capacity(dyn_topo.len());
     for i in 0..input_tns.len() {
     for i in 0..input_tns.len() {
         match input_types[i] {
         match input_types[i] {